SLVP

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* Application's name: ''Selective Load Value Prediction''
* Application's name: ''Selective Load Value Prediction''
* Application's acronym: ''SLVP''
* Application's acronym: ''SLVP''
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* Scientific domain: ''domain''
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* Scientific domain: ''Engineering''
* Contact person: ''Adrian Florea, adrian.florea<>ulbsibiu.ro''
* Contact person: ''Adrian Florea, adrian.florea<>ulbsibiu.ro''
* Main Developers: ''Arpad Gellert, Horia Calborean, Adrian Florea, Lucian Vintan, 'Lucian Blaga'
* Main Developers: ''Arpad Gellert, Horia Calborean, Adrian Florea, Lucian Vintan, 'Lucian Blaga'

Revision as of 06:19, 16 August 2013

Contents

General Information

  • Application's name: Selective Load Value Prediction
  • Application's acronym: SLVP
  • Scientific domain: Engineering
  • Contact person: Adrian Florea, adrian.florea<>ulbsibiu.ro
  • Main Developers: Arpad Gellert, Horia Calborean, Adrian Florea, Lucian Vintan, 'Lucian Blaga'

University of Sibiu / Computer Science and Electrical Engineering

  • Co-developers: -
  • Allocation period: 01/06/2013-31/08/2013
  • Web site:

Objectives of the computing project

We will evaluate our highly parameterized SLVP-based superscalar and SMT architectures from the M-SIM simulator by performing automatic design space explorations (one for superscalar and one or more for SMT) with our developed FADSE tool. We will analyze what a domain-ontology is (for real-time multicore systems), and how might it be formally represented and, after this, to try to understand how such a domain-ontology might improve the effectiveness of our DSE multi-objective algorithm. We have to try to develop a domain-ontology focused on our SLVP-based processor and, after that, try to implement it into our DSE algorithms.

Application's description

With this project we intend to find the near-optimal instances for a complex speculative microarchitecture. In our previous work we performed an automatic design space exploration of a Selective Load Value Prediction (SLVP) based superscalar architecture in order to find optimal configurations in terms of CPI (Cycles per Instruction) and energy consumption. The main goals of this work are to introduce new parameters for the SLVP structure, to determine the influence of these additional parameters, as well as to analyze the role of an expert-knowledge based ontology over the results, from the quality and convergence-speed viewpoints. By increasing the number of varied parameters to 23 the resulting design space is huge (more than 121 millions of billions configurations) which obviously means that only heuristic search can be considered. Therefore, the results will be generated with our developed FADSE tool which uses the NSGA-II multi-objective genetic algorithm introduced by Deb.

To perform design space exploration we have developed a tool called Framework for Automatic Design Space Exploration (FADSE). It includes many state of the art evolutionary algorithms through the included jMetal library. FADSE can be connected to almost any existing simulator. The parameters are described through an extensible XML interface. FADSE allows parallel evaluation (included algorithms had to be modified to allow this). FADSE is a client-server application. The number of clients can be dynamically changed. Clients can be stopped or started while the DSE process runs. Since performing DSE can take a lot of time (weeks) reliability of the DSE tool is a major concern. FADSE is able to cope with failing clients, failing networks or even power loss of the entire system. It is able to recover from these situations by detecting the problems and resubmitting the simulations to other clients. In case of power loss, it can restart the DSE process by making use of the integrated checkpointing mechanism. It contains a database which allows reusing already simulated individuals. This leads to a reduction of the time required to perform an exploration process. FADSE includes many metrics that the user can choose to evaluate the DSE process or to compare different algorithms. Some of the implemented metrics are: hypervolume, coverage, two set difference hypervolume etc. In our previous experiments, running one generation on 96 cores belonging to an Intel Xeon powered HPC system, with cores running at 2GHz, takes around one day.

Results expected in the allocation period

• Graphic which compares the Pareto front of our new extended architecture (so called Multi_VPT) with the Pareto front from our previous paper (see GELLÉRT Á., CALBOREAN H., VINŢAN L., FLOREA A. - Multi-Objective Optimizations for a Superscalar Architecture with Selective Value Prediction, IET Computers & Digital Techniques, Vol. 6, No. , ISSN: 1751-8601) (so called Last_VPT), both without ontology (only constraints);

• Graphics comparing the Pareto fronts as well as the hypervolumes obtained with and without ontology. From the hypervolume evolution over the generations we can observe the convergence speed of the algorithm and also the fact that around generation 25 the better individuals found are not so often and the algorithm converges to a relative stable Pareto front approximation.

Taking into account that in our previous experiments, running one generation on 96 cores belonging to an Intel Xeon powered HPC system, with cores running at 2GHz, takes around one day, and we need to simulate at least 25 generation we considered that we need around two month allocation period for our simulation.

Activity report

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